From 6cf492cfe939329af84780ec3b9a7aff954077ac Mon Sep 17 00:00:00 2001 From: Keir Fraser Date: Wed, 24 Oct 2007 10:20:03 +0100 Subject: [PATCH] x86, cpufreq: Allow dom0 kernel to govern cpufreq via the Intel Enahanced SpeedStep MSR. From: Kevin Tian Signed-off-by: Keir Fraser --- xen/arch/x86/traps.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 8ccbeee2c6..0aa8c8ba54 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1773,6 +1773,12 @@ static int emulate_privileged_op(struct cpu_user_regs *regs) wrmsr_safe(regs->ecx, eax, edx) ) goto fail; break; + case MSR_IA32_PERF_CTL: + if ( (cpufreq_controller != FREQCTL_dom0_kernel) || + (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) || + wrmsr_safe(regs->ecx, eax, edx) ) + goto fail; + break; default: if ( wrmsr_hypervisor_regs(regs->ecx, eax, edx) ) break; -- 2.30.2